New iBook's Key Feature--On-Chip Cache
Until the new iBooks, all G3 CPUs with L2 cache have used backside L2 cache technology, i.e. the cache is on the CPU board but not integrated with the CPU. Many expressed concern for the speed of the new iBooks with the reduction in cache size from 512K to 256K. However, the smaller on-chip cache will be faster in clock speed and in communication speed than the older and larger but slower backside cache technology. We will have to wait for benchmarks to see whether there is a detectable change in net performance of the G3 CPU. Hopefully, this signals an incipient deployment of the much faster IBM G3 CPUs (to 700 MHz) in PowerBooks. [Dana Baggett] P.S. The system bus remains at 66 MHz. All other Apple products are at 100 MHz.
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